Minister Vaishnaw Launches India's First 3nm Chip Design Centers

Union Minister for Electronics & Information Technology, Ashwini Vaishnaw, inaugurated two advanced design facilities of Renesas Electronics India in Noida and Bengaluru. These state-of-the-art centres are the first in the country to focus on 3-nanometer (nm) chip design, marking a major milestone in India’s semiconductor journey.

The new facilities form a key part of India’s broader semiconductor strategy, which encompasses the entire value chain—including design, fabrication, assembly, testing, marking, and packaging (ATMP)—as well as the development of supporting infrastructure such as equipment, chemicals, and gases. The Noida centre, in particular, signifies a critical step toward harnessing India’s engineering talent to build a robust, self-sustaining semiconductor ecosystem.

To further strengthen this foundation, the Minister also announced the launch of a new semiconductor learning kit designed to enhance hands-on hardware skills among students. More than 270 academic institutions—already equipped with advanced EDA tools through the India Semiconductor Mission—will now also benefit from these kits. “By combining software and hardware training, we are creating truly industry-ready engineers. This is about more than infrastructure—it’s about building long-term talent,” said Vaishnaw.

Renesas Electronics CEO & MD Hidetoshi Shibata emphasized India’s strategic role in the company’s global operations, particularly in embedded systems and system innovation. He reaffirmed Renesas’ commitment to expanding its capabilities in India and supporting local academia and startups through programs such as Chips to Startup (C2S) and the Design Linked Incentive (DLI) Scheme.

News by Rahul Yelligetti.